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a u optronics corporation product specification document version 0.0 1/36 ( v ) preliminary specifications ( ) final specifications module 15.4? wsxga+ color tft-lcd model name b154sw01 v8 customer date checked & approved by note: this specification is subject to change without notice. approved by date prepared by nbbu marketing division / au optronics corporation www..net
a u optronics corporation product specification document version 0.0 2/36 contents 1. handling precautions....................................................................................... 4 2. general description.......................................................................................... 5 2.1 display characteristics .................................................................................................... .. 5 2.2 optical characteristics.................................................................................................... ... 6 3. functional block diagra m.............................................................................. 11 4. absolute maximum ratings........................................................................... 12 4.1 tft lcd module ............................................................................................................. 12 4.2 backlight unit............................................................................................................. ...... 12 4.3 absolute ratings of environment..................................................................................... 12 5. electrical characteristics ............................................................................... 13 5.1 tft lcd module ............................................................................................................. 13 5.2 backlight unit............................................................................................................. ...... 15 6. signal characteristic ...................................................................................... 17 6.1 pixel format image......................................................................................................... .17 6.2 the input data format...................................................................................................... .18 6.3 signal description ......................................................................................................... ... 19 6.4 interface timing ........................................................................................................... .... 22 6.5 power on/off sequence ............................................................................................... 24 7. connector & pin assignm ent ........................................................................ 25 7.1 tft lcd module ............................................................................................................. 25 7.2 backlight unit............................................................................................................. ...... 25 7.3 signal for lamp connector............................................................................................... 25 8. vibration and shock test............................................................................... 26 8.1 vibration test ............................................................................................................. ...... 26 8.2 shock test spec: ........................................................................................................... .. 26 9. reliability......................................................................................................... 27 10. mechanical characteristics ......................................................................... 28 10.1 lcm outline dimension ................................................................................................. 28 10.2 screw hole depth and center position ......................................................................... 30 11. shipping and package .... ............................................................................. 31 11.1 shipping label format................................................................................................... 31 11.2. carton package........................................................................................................... .. 31 11.3 shipping package of palletizing sequence ..................................................................... 32 12. appendix: edid description......................................................................... 33 www..net
a u optronics corporation product specification document version 0.0 3/36 record of revision version and date page old description new description remark 0.1 2007/05/31 all first edition for customer www..net
a u optronics corporation product specification document version 0.0 4/36 1. handling precautions 1) since front polarizer is easily damaged, pay attention not to scratch it. 2) be sure to turn off power supply when inserting or disconnecting from input connector. 3) wipe off water drop immediately. long contact with water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at the back of the module to any directions. 9) in case if a module has to be put back into the packing container slot after once it was taken out from the container, do not press the center of the ccfl reflector edge. instead, press at the far ends of the cfl reflector edge softly. otherwise the tft module may be damaged. 10) at the insertion or removal of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft module. 11) after installation of the tft module into an enclosure (notebook pc bezel, for example), do not twist nor bend the tft module even momentary. at designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the tft module from outside. otherwise the tft module may be damaged. 12) cold cathode fluorescent lamp in lcd contains a small amount of mercury. please follow local ordinances or regulations for disposal. 13) small amount of materials having no flammability grade is used in the lcd module. the lcd module should be supplied by power complied with requirements of limited power source(, iec60950 or ul1950), or be applied exemption. 14) the lcd module is designed so that the ccfl in it is supplied by limited current circuit(iec60950 or ul1950). do not connect the ccfl in hazardous voltage circuit. www..net
a u optronics corporation product specification document version 0.0 5/36 2. general description b154sw01 v8 is a color active matrix liquid crystal display composed of a tft lcd panel, a driver circuit, and backlight system. the screen format is intended to support the wsxga+ (1680(h) x 1050(v)) screen and 262k colors (rgb 6-bits data driver). all input signals are lvds interface compatible. inverter of backlight is not included. b154sw01 v8 is designed for a display unit of notebook style personal computer and industrial machine. 2.1 general specification the following items are characteristics summary on the table at 25 j condition: items unit specifications screen diagonal [mm] 390.8 (15.4?w) active area [mm] 331.38 x 207.11 pixels h x v 1680 x 3(rgb) x 1050 pixel pitch [mm] 0.19725x0.19725 pixel arrangement r.g.b. vertical stripe display mode normally white white luminance (i ccfl =6.0ma) note: i ccfl is lamp current [cd/m 2 ] 200 typ. (5 points average) 180 min. (5 points average) ( note1 ) luminance uniformity 1.3 max. (5 points) contrast ratio 400 typ 300 min. optical rise time/fall time [msec] 6/10 typ. nominal input voltage vdd [volt] +3.3 typ. power consumption [watt] 2.5 max.(without inverter) weight (with inverter) [grams] 620 max. physical size [mm] 344.0 typ. x 222.0 typ. x 6.5 max. electrical interface 2 channel lvds surface treatment glare, hardness 3h www..net
a u optronics corporation product specification document version 0.0 6/36 support color 262k colors ( rgb 6-bit ) temperature range operating storage (non-operating) [ o c] [ o c] 0 to +50 -20 to +60 rohs compliance rohs compliance 2.2 optical characteristics the optical characteristics are measured under stable conditions at 25 j (room temperature): item unit conditions min. typ. max. note white luminance i ccfl =6.0ma [cd/m 2 ] 5 points average 180 200 - 1, 4, 5. [degree] [degree] horizontal (right) cr = 10 (left) 60 60 65 65 - - viewing angle [degree] [degree] vertical (upper) cr = 10 (lower) 40 50 45 55 - - 8 luminance uniformity 5 points 1.3 1 luminance uniformity 13 points 1.52 2 cr: contrast ratio 300:1 400:1 - 6 cross talk % 4 7 [msec] rising - 6 8 [msec] falling - 10 17 response time [msec] rising + falling 16 25 8 red x 0.556 0.576 0.596 red y 0.310 0.330 0.350 green x 0.292 0.312 0.332 green y 0.530 0.550 0.570 blue x 0.141 0.161 0.181 blue y 0.128 0.148 0.168 white x 0.293 0.313 0.333 color / chromaticity coordinates (cie 1931) white y 0.309 0.329 0.349 2,8 www..net
a u optronics corporation product specification document version 0.0 7/36 note 1: 5 points position (display area : 331.38mm x 207.11mm) 1 2 3 45 h/4 h/4 h/4 h/4 h w w/4 w/4 w/4 w/4 note 2: 13 points position w/4 w w/4 h h/4 h/4 h/4 h/4 7 9 10 w/4 1 8 w/4 10 10 10 10 2 3 13 12 45 6 11 note 3: the luminance uniformity of 5 and 13 points is defined by dividing the maximum luminance values by the minimum test point luminance note 4: measurement method _ w13 = maximum brightness o f thirteen points minimum brightness of thirteen points maximum brightness o f f ive points _ w5 = minimum brightness of five points www..net
a u optronics corporation product specification document version 0.0 8/36 the lcd module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during measuring. in order to stabilize the luminance, the measurement should be executed after lighting backlight for 30 minutes in a stable, windless and dark room. note 5 ?g definition of average luminance of white (y l ): measure the luminance of gray level 63 at 5 points ?a y l = [l (1)+ l (2)+ l (3)+ l (4)+ l (5)] / 5 l (x) is corresponding to the luminance of the point x at figure in note (1). note 6 ?g definition of contrast ratio: contrast ratio is calculated with the following formula. note 7 ?g definition of cross talk (ct) ct = | y b ? y a | / y a 100 (%) where y a = luminance of measured location without gray level 0 pattern (cd/m 2 ) center of the screen tft - lcd module 50 cm photo detector lcd panel field=2 x contrast ratio ( cr ) = bri g htness on the ?white? state bri g htness on the ?black? state www..net
a u optronics corporation product specification document version 0.0 9/36 y b = luminance of measured location with gray level 0 pattern (cd/m 2 ) note 8: definition of response time: the output signals of bm-7 or equivalent are measured when the input signals are changed from ?black? to ?white? (falling time) and from ?white? to ?black? (rising time), respectively. the response time interval between the 10% and 90% of amplitudes. refer to figure as below. s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% www..net
a u optronics corporation product specification document version 0.0 10/36 note 8. definition of viewing angle viewing angle is the measurement of contrast ratio ? 10, at the screen center, over a 180 horizontal and 180 vertical range (off-normal viewing angles). the 180 viewing angle range is broken down as follows; 90 ( c ) horizontal left and right and 90 ( x ) vertical, high (up) and low (down). the measurement direction is typically perpendicular to the display surface with the screen rotated about its center to develop the desired measurement viewing angle. www..net
a u optronics corporation product specification document version 0.0 11/36 3. functional block diagram the following diagram shows the functional block of the 15.4 inches wide color tft/lcd module: tft array/cell vdd lcd controller lcd drive board backlight unit 1680(r/g/b) x 3 x 1050 gnd dc-dc converter ref circuit y-driver x-driver rxin0 rxin1 rxin2 rxclkin (4 pairs lvds) jae fi-xb30sl-hf10 mating housing jae fi-x30h jst bhsr-02vs-1 mating type sm02b-bhss-1-tb lam p connector ( 2 p in ) lcd connector ( 30 p in ) www..net
a u optronics corporation product specification document version 0.0 12/36 4. absolute maximum ratings absolute maximum ratings of the module is as following: 4.1 absolute ratings of tft lcd module item symbol min max unit conditions logic/lcd drive voltage vin -0.3 +4.0 [volt] note 1,2 4.2 absolute ratings of backlight unit item symbol min max unit conditions ccfl current iccfl - 7.0 [ma] rms note 1,2 4.3 absolute ratings of environment item symbol min max unit conditions operating temperature top 0 +50 [ o c] note 3 operation humidity hop 5 95 [%rh] note 3 storage temperature tst -20 +60 [ o c] note 3 storage humidity hst 5 95 [%rh] note 3 note 1: at ta (25 j ) note 2: permanent damage to the device may occur if exceed maximum values note 3: for quality performance, please refer to auo iis(incoming inspection standard). twb=39 c operating range storage range www..net
a u optronics corporation product specification document version 0.0 13/36 5. electrical characteristics 5.1 tft lcd module 5.1.1 power specification input power specifications are as follows; symble parameter min typ max units note vdd logic/lcd drive volta g e 3.0 3.3 3.6 [volt] pdd vdd power 2.5 [watt] note 1 idd idd current 700 800 [ma] note 1 i rush inrush current 2000 [ma] note 2 vddrp allowable logic/lcd drive ripple voltage 100 [mv] p-p note 1 : maximum measurement condition ?g black patterm note 2 ?g measure condition 90% 10% vin rising time 0v 3.3v 0.5ms www..net
a u optronics corporation product specification document version 0.0 14/36 5.1.2 signal electrical characteristics input signals shall be low or high-impedance state when vdd is off. it is recommended to refer the specifications of thc63lvdf84a(thine electronics inc.) in detail. signal electrical characteristics are as follows; parameter condition min max unit vth differential input high threshold (vcm=+1.2v) 100 [mv] vtl differential input low threshold (vcm=+1.2v) -100 [mv] vcm differential input common mode voltage 1.125 1.375 [v] note: lvds signal waveform v t vcm v ss www..net
a u optronics corporation product specification document version 0.0 15/36 5.2 backlight unit parameter guideline for ccfl inverter parameter min typ max units condition white luminance 5 points average 180 200 - [cd/m 2 ] ( ta=25 j ) ccfl current(i ccfl ) 2.0 6.0 7 [ma] rms (ta=25 j ) note 2 ccfl frequency(f ccfl ) 50 55 60 [khz] (ta=25 j ) note 3,4 ccfl ignition voltage(vs) 1650 [volt] rms (ta= 0 j ) note 5 ccfl ignition voltage(vs) 1460 [volt] rms (ta= 25 j ) note 5 ccfl voltage (reference) (v ccfl ) 700 730 945 [volt] rms (ta=25 j ) note 6 ccfl power consumption (p ccfl ) - 4.38 [watt] (ta=25 j ) note 6 note 1: typ are auo recommended design points. *1 all of characteristics listed are measured under the condition using the auo test inverter. *2 in case of using an inverter other than listed, it is recommended to check the inverter carefully. sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen. *3 in designing an inverter, it is suggested to check safety circuit very carefully. impedance of ccfl, for instance, becomes more than 1 [m ohm] when cfl is damaged. *4 generally, ccfl has some amount of delay time after applying kick-off voltage. it is recommended to keep on applying kick-off voltage for 1 [sec] until discharge. *5 ccfl discharge frequency must be carefully chosen so as not to produce interfering noise stripes on the screen. *6 reducing ccfl current increases ccfl discharge voltage and generally increases ccfl discharge frequency. so all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high-voltage output of the inverter. note 2: it should be employed the inverter which has ?duty dimming?, if iccfl is less than 4ma. note 3: ccfl discharge frequency should be carefully determined to avoid interference between inverter and tft lcd. note 4: the frequency range will not affect to lamp life and reliability characteristics. note 5: ccfl inverter should be able to give out a power that has a generating capacity of over 1,430 voltage. lamp units need 1,400 voltage minimum for ignition. www..net
a u optronics corporation product specification document version 0.0 16/36 note 6: calculator value for reference (i ccfl v ccfl =p ccfl ) note 7: requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp, are following. it shall help increase the lamp lifetime and reduce leakage current. a. the asymmetry rate of the inverter waveform should be less than 10%. b. the distortion rate of the waveform should bewithin ?? 2 ? 10%. * inverter output waveform had better be more similar to ideal sine wave. www..net
au optronics corporation product specification document version 0.0 17/36 6. signal characteristic 6.1 pixel format image following figure shows the relationship of the input signals and lcd pixel format. r g b r g b r g b r g b r g b r g b r g b r g b 0 1 1278 1680 1st line 1050th line www..net
au optronics corporation product specification document version 0.0 18/36 6.2 the input data format signal name description r5 r4 r3 r2 r1 r0 red data 5 (msb) red data 4 red data 3 red data 2 red data 1 red data 0 (lsb) red-pixel data red-pixel data each red pixel's brightness data consists of these 6 bits pixel data. g5 g4 g3 g2 g1 g0 green data 5 (msb) green data 4 green data 3 green data 2 green data 1 green data 0 (lsb) green-pixel data green-pixel data each green pixel's brightness data consists of these 6 bits pixel data. b5 b4 b3 b2 b1 b0 blue data 5 (msb) blue data 4 blue data 3 blue data 2 blue data 1 blue data 0 (lsb) blue-pixel data blue-pixel data each blue pixel's brightness data consists of these 6 bits pixel data. rxclkin data clock the typical frequency is 64.9 mhz.. the signal is used to strobe the pixel data and de signals. all pixel data shall be valid at the falling edge when the de signal is high. de display timing this signal is strobed at the falling edge of rxclkin. when the signal is high, the pixel data shall be valid to be displayed. vs vertical sync the signal is synchronized to rxclkin . hs horizontal sync the signal is synchronized to rxclkin . note: output signals from any system shall be low or high-impedance state when vdd is off. www..net
au optronics corporation product specification document version 0.0 19/36 6.3 signal descripti on/pin assignment lvds is a differential signal technology for l cd interface and high speed data transfer device. pin# signal name description 1 gnd ground 2 vdd +3.3v power supply (typical) 3 vdd +3.3v power supply (typical) 4 v edid +3.3v edid power 5 nc reserved for supplier test point 6 clk edid edid clock input 7 data edid edid data input 8 rxin0- lvds differential data input(r0-r5, g0) (odd pixels) 9 rxin0+ lvds differential data input(r0-r5, g0) (odd pixels) 10 gnd ground 11 rxin1- lvds differential data input(g1-g5, b0-b1) (odd pixels) 12 rxin1+ lvds differential data input(g1-g5, b0-b1) (odd pixels) 13 gnd ground 14 rxin2- lvds differential data input(b2-b5, hs, vs, de) (odd pixels) 15 rxin2+ lvds differential data input(b2-b5, hs, vs, de) (odd pixels) 16 gnd ground 17 rxclkin- lvds differential clock input (odd pixels) 18 rxclkin+ lvds differential clock input (odd pixels) 19 gnd ground 20 even_rxin0- lvds differential data input (r0-r5,g0) (even pixels) 21 even_rxin0+ lvds differential data input (r0-r5,g0) (even pixels) 22 gnd ground 23 even_rxin1- lvds differential data input (g1-g5,b0-b1) (even pixels) 24 even_rxin1+ lvds differential data input (g1-g5,b0-b1) (even pixels) 25 gnd ground 26 even_rxin2- lvds differential data input (b2-b5,hs,vs,de) (even pixels) 27 even_rxin2+ lvds differential data input (b2-b5,hs,vs,de) (even pixels) 28 gnd ground 29 even_rxclkin- lvds differential clock input (even pixels) , 2.1v 30 even_rxclkin+ lvds differential clock input (even pixels) , 2.1v ?i note 1 ?j relation between lvds signals and actual data shows below section(4-2). ?i note 2 ?j the shielding case is connected with signal gnd. www..net
au optronics corporation product specification document version 0.0 20/36 note1: start from right side note2: input signals shall be low or high-impedance state when vdd is off. 30 1 nc gnd connecto r www..net
au optronics corporation product specification document version 0.0 21/36 internal circuit of lvds inputs are as following. the module uses a 100ohm resistor between positiv e and negative data lines of each receiver input r r r r lvds receiver signal input pin no. 9 11 12 14 15 17 18 8 rxin0+ rxin0- rxin1+ rxin1- rxin2+ rxin2- rxclkin+ rxclkin- www..net
au optronics corporation product specification document version 0.0 22/36 6.4 interface timing 6.4.1 timing characteristics basically, interface timings should match the 1680x1050 /60hz manufacturing guide line timing. parameter symbol min. typ. max. unit frame rate - 50 60 - hz clock frequency 1/ t clock 40 59.5 80 mhz period t v 1080 1080 1080 active t vd 1050 1050 1050 vertical section blanking t vb 30 30 30 t line period t h 1840 1840 1840 active t hd 1680 1680 1680 horizontal section blanking t hb 160 160 160 t clock note : de mode only www..net
au optronics corporation product specification document version 0.0 23/36 6.4.2 timing diagram dotclk de t h t hb t hd de t v t vb t vd input timing definition ( de mode) t clock input data pixel 1 pixel 2 pixel 3 pixel n-1 pixel n invaild data invaild data pixel 1 www..net
au optronics corporation product specification document version 0.0 24/36 6.5 power on/off sequence vdd power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vdd is off. power sequence timing value parameter min. typ. max. units t1 0.5 - 10 (ms) t2 0 - 50 (ms) t3 0 - 50 (ms) t4 400 - - (ms) t5 200 - - (ms) t6 200 - - (ms) t7 0 - 10 (ms) t4 t3 t2 t5 valid data t1 10% 90% 10% 90% t6 t7 power supply vdd lvds interfac e backlight on www..net
au optronics corporation product specification document version 0.0 25/36 7. connector description physical interface is described as for the connector on module. these connectors are c apable of accommodating the following signals and will be following components. 7.1 tft lcd module connector name / designation for signal connector manufacturer jae or compatible type / part number fi-xb30sl-hf10 or compatible mating housing/part number fi-x30h or compatible 7.2 backlight unit physical interface is described as for the connector on module. these connectors are c apable of accommodating the following signals and will be following components. connector name / designation for lamp connector manufacturer jst type / part number bhsr-02vs-1 mating type / part number sm02b-bhss-1-tb 7.3 signal for lamp connector pin # cable color signal name 1 red lamp high voltage 2 white lamp low voltage www..net
au optronics corporation product specification document version 0.0 26/36 8. vibration and shock test 8.1 vibration test test spec: z test method: non-operation z acceleration: 2.16g z frequency: 10 - 500hz random z sweep: 30 minutes each axis (x, y, z) 8.2 shock test spec: test spec: z test method: non-operation z acceleration: 200 g , half sine wave z active time: 2 ms z pulse: x,y,z .three time for each side www..net
au optronics corporation product specification document version 0.0 27/36 9. reliability items required condition note temperature humidity bias 40 j /95%,250hr high temperature operation 50 j /dry,250hr low temperature operation 0 j ,250hr on/off test 25 j ,150hrs(on/10 sec. off/10sec., 30,000 cycles) hot storage 60 j /35% rh ,240 hours cold storage -20 j /50% rh ,240 hours thermal shock test -20 j /30 min ,60 j /30 min 100cycles hot start test 50 j /1 hr min. power on/off per 5 minutes, 5 times cold start test 0 j /1 hr min. power on/off per 5 minutes, 5 times shock test (non-operating) 200g, 2ms, half-sine wave, 3 times for each x,y,z direction vibration test (non-operating) random vibration, 2.16 g zero-to-peak, 10 to 500 hz, 30 mins in each of three mutually perpendicular axes. esd contact : ? 8kv/ operation air : ? 15kv / operation note 1 room temperature test 25 j , 2000hours, operating with loop pattern note1: according to en61000-4-2 , esd class b: some performance degradation allowed. no data lost . self-recoverable. no hardware failures. note2: ccfl life time: 10,000 hours minimum under normal module usage. note3: mtbf (excluding the ccfl): 30,000 hours with a confidence level 90% www..net
document version 0.0 28/36 10. mechanical characteristics 10.1 lcm outline dimension www..net
document version 0.0 29/36 www..net
document version 0.0 30/36 10.2 screw hole depth and center position screw hole minimum depth, from side surface =2.55 mm (see drawing) screw hole center location, from front surface = 3.7 0.2mm (see drawing) screw torque: maximum 2.5 kgf-cm www..net
document version 0.0 31/36 11. shipping and package 11.1 shipping label format week code model name control code www..net
document version 0.0 32/36 11.2. carton package the outside dimension of carton is 455 (l)mm x 380 (w)mm x 355 (h)mm 11.3 shipping package of palletizing sequence 11.3 shipping package of palletizing sequence top cardboard wooden pallet bottom cardboard corner angle stretch film pe band note : limit of box palletizing = max 3 layers(ship and stock co nditions) www..net
document version 0.0 33/36 12. appendix: edid description b154sw01 v7 edid code release time 2006/10/20 00:00 address function value value value note hex hex bin dec 00 header 00 00000000 0 01 ff 11111111 255 02 ff 11111111 255 03 ff 11111111 255 04 ff 11111111 255 05 ff 11111111 255 06 ff 11111111 255 07 00 00000000 0 08 eisa manuf. code lsb 06 00000110 6 09 compressed ascii af 10101111 175 0a product code 7b 01111011 123 0b hex, lsb first 17 00010111 23 0c 32-bit ser # 00 00000000 0 0d 00 00000000 0 0e 00 00000000 0 0f 00 00000000 0 10 week of manufacture 01 00000001 1 11 year of manufacture 10 00010000 16 12 edid structure ver. 01 00000001 1 13 edid revision # 03 00000011 3 14 video input def. (digital i/p, non-tmds, crgb) 80 10000000 128 15 max h image size (rounded to cm) 22 00100010 34 16 max v image size (rounded to cm) 16 00010110 22 17 display gamma (=(gamma*100)-100) 78 01111000 120 18 feature support (no dpms, active off, rgb, tmg blk#1) 0a 00001010 10 19 red/green low bits (lower 2:2:2:2 bits) ff 11111111 255 1a blue/white low bits (lower 2:2:2:2 bits) d5 11010101 213 1b red x (upper 8 bits) 90 10010000 144 1c red y/ higher 8 bits 51 01010001 81 1d green x 50 01010000 80 1e green y 8d 10001101 141 1f blue x 2a 00101010 42 20 blue y 29 00101001 41 21 white x 50 01010000 80 22 white y 54 01010100 84 www..net
document version 0.0 34/36 23 established timing 1 00 00000000 0 24 established timing 2 00 00000000 0 25 established timing 3 00 00000000 0 26 standard timing #1 01 00000001 1 27 01 00000001 1 28 standard timing #2 01 00000001 1 29 01 00000001 1 2a standard timing #3 01 00000001 1 2b 01 00000001 1 2c standard timing #4 01 00000001 1 2d 01 00000001 1 2e standard timing #5 01 00000001 1 2f 01 00000001 1 30 standard timing #6 01 00000001 1 31 01 00000001 1 32 standard timing #7 01 00000001 1 33 01 00000001 1 34 standard timing #8 01 00000001 1 35 01 00000001 1 36 pixel clock/10000 lsb 7c 01111100 124 37 pixel clock/10000 usb 2e 00101110 46 38 horz active lower 8bits 90 10010000 144 39 horz blanking lower 8bits a0 10100000 160 3a horzact:horzblnk upper 4:4 bits 60 01100000 96 3b vertical active lower 8bits 1a 00011010 26 3c vertical blanking lower 8bits 1e 00011110 30 3d vert act : vertical blanking (upper 4:4 bit) 40 01000000 64 3e horzsync. offset 30 00110000 48 3f horzsync.width 20 00100000 32 40 vertsync.offset : vertsync.width 36 00110110 54 41 horz&vert sync offset/width upper 2bits 00 00000000 0 42 horizontal image size lower 8bits 58 01011000 88 43 vertical image size lower 8bits de 11011110 222 44 horizontal & vertical image size (upper 4:4 bits) 10 00010000 16 45 horizontal border (zero for internal lcd) 00 00000000 0 46 vertical border (zero for internal lcd) 00 00000000 0 47 signal (non-intr, norm, no stero, sep sync, neg pol) 18 00011000 24 48 detailed timing/monitor 00 00000000 0 49 descriptor #2 00 00000000 0 4a 00 00000000 0 4b 0f 00001111 15 www..net
document version 0.0 35/36 4c 00 00000000 0 4d 00 00000000 0 4e 00 00000000 0 4f 00 00000000 0 50 00 00000000 0 51 00 00000000 0 52 00 00000000 0 53 00 00000000 0 54 00 00000000 0 55 00 00000000 0 56 00 00000000 0 57 00 00000000 0 58 00 00000000 0 59 20 00100000 32 5a detailed timing/monitor 00 00000000 0 5b descriptor #3 00 00000000 0 5c 00 00000000 0 5d fe 11111110 254 5e 00 00000000 0 5f manufacture 41 01000001 65 a 60 manufacture 55 01010101 85 u 61 manufacture 4f 01001111 79 o 62 0a 00001010 10 63 20 00100000 32 64 20 00100000 32 65 20 00100000 32 66 20 00100000 32 67 20 00100000 32 68 20 00100000 32 69 20 00100000 32 6a 20 00100000 32 6b 20 00100000 32 6c detailed timing/monitor 00 00000000 0 6d descriptor #4 00 00000000 0 6e 00 00000000 0 6f fe 11111110 254 70 00 00000000 0 71 manufacture p/n 42 01000010 66 b 72 manufacture p/n 31 00110001 49 1 73 manufacture p/n 35 00110101 53 5 74 manufacture p/n 34 00110100 52 4 www..net
document version 0.0 36/36 75 manufacture p/n 53 01010011 83 s 76 manufacture p/n 57 01010111 87 w 77 manufacture p/n 30 00110000 48 0 78 manufacture p/n 31 00110001 49 1 79 manufacture p/n 20 00100000 32 7a manufacture p/n 56 01010110 86 v 7b manufacture p/n 37 00110111 55 8 7c 20 00100000 32 7d 0a 00001010 10 7e extension flag 00 00000000 0 7f checksum 49 01001001 73 www..net

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